In data processing systems using multiple processors, such as packet formatter systems, large amounts of information must often be transferred between processors. Because a receiving processor may not be ready to process information at the exact moment it is being sent by a transmitting processor, some form of buffer storage such as a first-in, first-out (FIFO) buffer or shared space in a common memory unit is sometimes employed. Due to the serial nature of a FIFO buffer, its use tends to slow down interprocessor communication. The use of a shared memory tends to preclude the use of relative addressing over a small range of memory locations. It would therefore be of great advantage to increase the efficiency of such multiple processor systems by permitting relative addressing so that high-speed execution of memory reference instructions could be obtained.